projects & join us

explore our cutting-edge research and become part of brown's open-source chip design community

current projects

real technical projects pushing the boundaries of chip design

entry-level projects

risc-v soc

risc-v soc

active
digital design

working with an ibex demo system featuring a complete soc architecture with essential components.

ram and gpio integration
uart and spi interfaces
debug module with jtag support
risc-vverilogdigital design
systolic array

systolic array

active
digital design

edge transformer and accelerator architectures with software/hardware co-design.

embedding vector processing
multi-layer architecture
attention head optimization
hardware accelerationco-designml
design space exploration

design space exploration

active
digital design

finding optimal software/hardware designs by mapping transformer design space with ppa analysis.

power-performance-area analysis
hardware-efficient design mapping
energy vs token delay balance
ppa analysisoptimizationarchitecture
pll (phase-locked loop)

pll (phase-locked loop)

active
custom design

frequency multiplier taking 240mhz input and generating 2.4ghz output signal.

dac and pfd components
vco & output buffer
10x frequency multiplication
analog designrfclock generation

advanced projects

5ghz trx

5ghz trx

active
rf designadvanced

advanced rf transceiver with stacked class-e power amplifier and integrated dual-issue risc-v processor.

stacked class-e pa architecture
5ghz operating frequency
dual-issue risc-v integration
rf designpower amplifierrisc-v

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